TDA5230 Datasheet, PDF (36/186 Pages) Infineon Technologies AG – Universal Low Power ASK/FSK Single Conversion Multi-Channel Image-Reject Receiver

TDA523x
Functional Description
Dual: ARFPLL2 and BRFPLL2:Conf. ARF PLL setting, channel 2 (Self Polling
Mode)
ADDR: 0x23 and 0x44
Bit R/W Description
4:2 W RFPLLR2: channel 2, PLL divider factor R¹⁾
000 : R = 8
001 : R = 1
010 : R = 2
011 : R = 3
100 : R = 4
101 : R = 5
110 : R = 6
111 : R = 7
1:0 W RFPLLS2: channel 2, PLL divider factor S¹⁾
00 : S = 1
01 : S = 0
10 : S = -1
11 : S = 0
Reset Value: 0x08
Dual: ARFPLL3 and BRFPLL3:Conf.A RF PLL setting, channel 3 (Self Polling
Mode)
ADDR: 0x24 and 0x45
Bit R/W Description
4:2 W RFPLLR3: channel 3, PLL divider factor R¹⁾
000 : R = 8
001 : R = 1
010 : R = 2
011 : R = 3
100 : R = 4
101 : R = 5
110 : R = 6
111 : R = 7
1:0 W RFPLLS3: channel 3, PLL divider factor S¹⁾
00 : S = 1
01 : S = 0
10 : S = -1
11 : S = 0
Reset Value: 0x0A
1) Channels with receive frequencies close to the harmonics of the reference crystal frequency should not be
used in applications.
Data Sheet
32
Version 4.0, 2007-06-01