TDA5230 Datasheet, PDF (128/186 Pages) Infineon Technologies AG – Universal Low Power ASK/FSK Single Conversion Multi-Channel Image-Reject Receiver

Read Register
TDA523x
Functional Description
NCS
Frame
1
81
81
8
SCK
Instruction
Register Address
SDI
I7 I6 I5 I4 I3 I2 I1 I0 A7 A6 A5 A4 A3 A2 A1 A0
Data Out
high impedance Z
SDO
D7 D6 D5 D4 D3 D2 D1 D0
Frame
1
81
81
8
Instruction
Register Address
I7 I6 I5 I4 I3 I2 I1 I0 A7 A6 A5 A4 A3 A2 A1 A0
Data Out
D7 D6 D5 D4 D3 D2 D1 D0
Figure 66 Read Register
To read from the device, the chip must be selected first. Therefore, the master must set
the NCS line to low. After this, the instruction byte and the address byte are shifted in on
SDI and stored in the internal instruction and address register. The data byte at this
address is then shifted out on SDO. After completing the read operation the master sets
the NCS line to high.
Write Register
NCS
SCK
SDI
Frame
1
81
81
8
Instruction
Register Address
Data Byte
I7 I6 I5 I4 I3 I2 I1 I0 A7 A6 A5 A4 A3 A2 A1 A0 D7 D6 D5 D4 D3 D2 D1 D0
Frame
1
81
81
8
Instruction
Register Address
Data Byte
I7 I6 I5 I4 I3 I2 I1 I0 A7 A6 A5 A4 A3 A2 A1 A0 D7 D6 D5 D4 D3 D2 D1 D0
SDO
high impedance Z
Figure 67 Write Register
To write to the device, the chip must be selected first. Therefore the master must set the
NCS line to low. After this, the instruction byte and the address byte are shifted in on SDI
and stored in the internal instruction and address register. The following data byte is then
stored at this address.
After completing the write operation, the master sets the NCS line to high.
Use of the SPI Trace Registers:
The received address byte is stored into the register SPIAT and the received data byte
is stored into the register SPIDT. These two trace registers are readable. Therefore, an
external controller is able to check the correct address and data transmission by reading
out these two registers after each write instruction. The trace registers are updated at
every write instruction, so only the last transmission can be checked by a read out of
these two registers.
Data Sheet
124
Version 4.0, 2007-06-01