Z8F0830HH020SG Datasheet, PDF (97/257 Pages) Zilog, Inc. – High-Performance 8-Bit Microcontrollers

Z8 Encore!^® F0830 Series
Product Specification
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3. Write to the Timer Reload High and Low Byte registers to set the reload value.
4. Clear the timer PWM High and Low Byte registers to 0000H. This allows user soft-
ware to determine if interrupts are generated by either a capture event or a reload. If
the PWM High and Low Byte registers still contain 0000H after the interrupt, the
interrupt were generated by a reload.
5. Enable the timer interrupt, if appropriate and set the timer interrupt priority by writing
to the relevant interrupt registers. By default, the timer interrupt is generated for both
input capture and Reload events. The user can configure the timer interrupt to be gen-
erated only at the input capture event or the reload event by setting the TICONFIG
field of the TxCTL1 Register.
6. Configure the associated GPIO port pin for the timer input alternate function.
7. Write to the Timer Control Register to enable the timer and initiate counting.
In CAPTURE Mode, the elapsed time between the timer start and the capture event can be
calculated using the following equation:
Capture Elapsed Time (s) = ^---C----a---p---t-u---r--e----V-----a--l--u---e----–-----S---t--a---r--t---V----a---l-u---e----^---^-----P---r--e---s--c---a---l-e-
System Clock Frequency (Hz)
COMPARE Mode
In COMPARE Mode, the timer counts up to 16-bit maximum compare value stored in the
Timer Reload High and Low Byte registers. The timer input is the system clock. Upon
reaching the compare value, the timer generates an interrupt and counting continues (the
timer value is not reset to 0001H). Additionally, if the timer output alternate function is
enabled, the timer output pin changes state (from Low to High or from High to Low) upon
compare.
If the timer reaches FFFFH, the timer resets to 0000H and continues counting.
Observe the following steps for configuring a timer for COMPARE Mode and for initiat-
ing the count:
1. Write to the Timer Control Register to:
– Disable the timer
– Configure the timer for COMPARE Mode
– Set the prescale value
– Set the initial logic level (High or Low) for the timer output alternate function
2. Write to the Timer High and Low Byte registers to set the starting count value.
3. Write to the Timer Reload High and Low Byte registers to set the compare value.
PS025113-1212
Operation