Z8F0830HH020SG Datasheet, PDF (83/257 Pages) Zilog, Inc. – High-Performance 8-Bit Microcontrollers

Z8 Encore!^® F0830 Series
Product Specification
65
Interrupt Edge Select Register
The interrupt edge select (IRQES) register determines whether an interrupt is generated
for the rising edge or falling edge on the selected GPIO Port A or Port D input pin. See
Table 47.
Table 47. Interrupt Edge Select Register (IRQES)
Bit
Field
RESET
R/W
Address
7
IES7
0
R/W
6
IES6
0
R/W
5
IES5
0
R/W
4
3
IES4
IES3
0
0
R/W
R/W
FCDH
2
IES2
0
R/W
1
IES1
0
R/W
0
IES0
0
R/W
Bit
Description
[7]
IESx
Interrupt Edge Select x
0 = An interrupt request is generated on the falling edge of the PAx input or PDx.
1 = An interrupt request is generated on the rising edge of the PAx input or PDx.
Note: x indicates register bits in the address range 7–0.
PS025113-1212
Interrupt Control Register Definitions