Z8F0830HH020SG Datasheet, PDF (160/257 Pages) Zilog, Inc. – High-Performance 8-Bit Microcontrollers

Z8 Encore!^® F0830 Series
Product Specification
142
• Watchdog Timer reset
• Asserting the RESET pin Low to initiate a reset
• Driving the DBG pin Low while the device is in STOP Mode initiates a system reset
OCD Data Format
The OCD interface uses the asynchronous data format defined for RS-232. Each character
is transmitted as 1 start bit, 8 data bits (least-significant bit first) and 1 stop bit. See
Figure 23.
START
D0
D1
D2
D3
D4
D5
D6
D7 STOP
Figure 23. OCD Data Format
OCD Autobaud Detector/Generator
To run over a range of baud rates (data bits per second) with various system clock frequen-
cies, the On-Chip Debugger contains an autobaud detector/generator. After a reset, the
OCD is idle until it receives data. The OCD requires that the first character sent from the
host is the character 80H. The character 80H has eight continuous bits low (one Start bit
plus 7 data bits), framed between high bits. The autobaud detector measures this period
and sets the OCD baud rate generator accordingly.
The autobaud detector/generator is clocked by the system clock. The minimum baud rate
is the system clock frequency divided by 512. For optimal operation with asynchronous
datastreams, the maximum recommended baud rate is the system clock frequency divided
by 8. The maximum possible baud rate for asynchronous datastreams is the system clock
frequency divided by 4, but this theoretical maximum is possible only for low noise
designs with clean signals. Table 94 lists minimum and recommended maximum baud
rates for sample crystal frequencies.
Table 94. OCD Baud-Rate Limits
System Clock
Frequency
(MHz)
20.0
1.0
0.032768 (32 KHz)
Recommended
Maximum Baud Rate
(kbps)
2500.0
125.0
4.096
Recommended
Standard PC Baud Rate
(bps)
1,843,200
115,200
2400
Minimum Baud Rate
(kbps)
39
1.95
0.064
PS025113-1212
Operation