Z8F0830HH020SG Datasheet, PDF (121/257 Pages) Zilog, Inc. – High-Performance 8-Bit Microcontrollers

Z8 Encore!^® F0830 Series
Product Specification
103
ADC Data High Byte Register
The ADC Data High Byte Register, listed in Table 64, contains the upper eight bits of the
ADC output. Access to the ADC Data High Byte Register is read-only. Reading the ADC
Data High Byte Register latches data in the ADC Low Bits Register.
Table 64. ADC Data High Byte Register (ADCD_H)
Bit
7
6
5
4
3
2
1
0
Field
ADCDH
RESET
X
R/W
R
Address
F72H
Bit
[7:0]
ADCDH
Description
ADC High Byte
00h–FFh = The last conversion output is held in the data registers until the next ADC conver-
sion is completed.
ADC Data Low Bits Register
The ADC Data Low Bits Register, shown in Table 65, contains the lower bits of the ADC
output. Access to the ADC Data Low Bits Register is read-only. Reading the ADC Data
High Byte Register latches lower bits of the ADC in the ADC Data Low Bits Register.
Table 65. ADC Data Low Bits Register (ADCD_L)
Bit
7
6
5
4
3
2
1
0
Field
ADCDL
Reserved
RESET
X
X
R/W
R
R
Address
F73H
Bit
[7:6]
ADCDL
[5:0]
Description
ADC Low Bits
00–11b = These bits are the two least-significant bits of the 10-bit ADC output. These bits are
undefined after a reset. The low bits are latched into this register whenever the ADC Data High
Byte Register is read.
Reserved
These bits are reserved and must be programmed to 000000.
PS025113-1212
ADC Control Register Definitions