Z8F0830HH020SG Datasheet, PDF (107/257 Pages) Zilog, Inc. – High-Performance 8-Bit Microcontrollers

Z8 Encore!^® F0830 Series
Product Specification
89
Bit
[6]
TPOL
Description (Continued)
Timer Input/Output Polarity
Operation of this bit is a function of the current operating mode of the timer.
ONE-SHOT Mode
When the timer is disabled, the timer output signal is set to the value of this bit. When the timer
is enabled, the timer output signal is complemented on timer reload.
CONTINUOUS Mode
When the timer is disabled, the timer output signal is set to the value of this bit. When the timer
is enabled and reloaded, the timer output signal is complemented.
COUNTER Mode
If the timer is disabled, the timer output signal is set to the value of this bit. If the timer is
enabled the timer output signal is complemented after timer reload.
0 = Count occurs on the rising edge of the timer input signal.
1 = Count occurs on the falling edge of the timer input signal.
PWM SINGLE OUTPUT Mode
0 = Timer output is forced Low (0), when the timer is disabled. The timer output is forced High
(1) when the timer is enabled and the PWM count matches and the timer output is forced
Low (0) when the timer is enabled and reloaded.
1 = Timer output is forced High (1), when the timer is disabled. The timer output is forced
low(0), when the timer is enabled and the PWM count matches and forced High (1) when
the timer is enabled and reloaded.
CAPTURE Mode
0 = Count is captured on the rising edge of the timer input signal.
1 = Count is captured on the falling edge of the timer input signal.
COMPARE Mode
When the timer is disabled, the timer output signal is set to the value of this bit. When the timer
is enabled and reloaded, the timer output signal is complemented.
GATED Mode
0 = Timer counts when the timer input signal is High (1) and interrupts are generated on the
falling edge of the timer input.
1 = Timer counts when the timer input signal is Low (0) and interrupts are generated on the ris-
ing edge of the timer input.
CAPTURE/COMPARE Mode
0 = Counting is started on the first rising edge of the timer input signal. The current count is
captured on subsequent rising edges of the timer input signal.
1 = Counting is started on the first falling edge of the timer input signal. The current count is
captured on subsequent falling edges of the timer input signal.
PS025113-1212
Timer Control Register Definitions