Z8F0830HH020SG Datasheet, PDF (47/257 Pages) Zilog, Inc. – High-Performance 8-Bit Microcontrollers

Z8 Encore!^® F0830 Series
Product Specification
29
Table 12. Reset Status Register (RSTSTAT)
Bit
7
6
5
4
3
2
1
0
Field
POR
STOP
WDT
EXT
Reserved
RESET
See Table 13
0
0
0
0
0
R/W
R
R
R
R
R
R
R
R
Address
FF0H
Bit
[7]
POR
[6]
STOP
[5]
WDT
[4]
EXT
[3:0]
Description
Power-On Reset Indicator
This bit is set to 1 if a Power-On Reset event occurs and is reset to 0, if a WDT time-out or Stop
Mode Recovery occurs. Reading this register also reset this bit to 0.
Stop Mode Recovery Indicator
This bit is set to 1 if a Stop Mode Recovery occurs. If the STOP and WDT bits are both set to 1,
the Stop Mode Recovery occurs because of a WDT time-out. If the STOP bit is 1 and the WDT
bit is 0, the Stop Mode Recovery is not caused by a WDT time-out. This bit is reset by a Power-
On Reset or a WDT time-out that occurred while not in STOP Mode. Reading this register also
resets this bit.
Watchdog Timer Time-Out Indicator
This bit is set to 1 if a WDT time-out occurs. A Power-On Reset resets this pin. A Stop Mode
Recovery from a change in an input pin also resets this bit. Reading this register resets this bit.
This read must occur before clearing the WDT interrupt.
External Reset Indicator
If this bit is set to 1, a reset initiated by the external RESET pin occurred. A Power-On Reset or
a Stop Mode Recovery from a change in an input pin resets this bit. Reading this register
resets this bit.
Reserved
These registers are reserved and must be programmed to 0000.
Table 13. POR Indicator Values
Reset or Stop Mode Recovery Event
Power-On Reset
Reset using RESET pin assertion
Reset using Watchdog Timer time-out
Reset using the On-Chip Debugger (OCTCTL[1] set to 1)
Reset from STOP Mode using DBG pin driven Low
Stop Mode Recovery using GPIO pin transition
Stop Mode Recovery using WDT time-out
POR STOP WDT EXT
1
0
0
0
0
0
0
1
0
0
1
0
1
0
0
0
1
0
0
0
0
1
0
0
0
1
1
0
PS025113-1212
Reset Register Definitions