Z8F0830HH020SG Datasheet, PDF (62/257 Pages) Zilog, Inc. – High-Performance 8-Bit Microcontrollers

Z8 Encore!^® F0830 Series
Product Specification
44
Port A–D High Drive Enable Subregisters
The Port A–D High Drive Enable Subregister, shown in Table 24, is accessed through the
Port A–D Control Register by writing 04H to the Port A–D Address Register. Setting the
bits in the Port A–D High Drive Enable subregisters to 1 configures the specified port pins
for high-output current drive operation. The Port A–D High Drive Enable Subregister
affects the pins directly and, as a result, alternate functions are also affected.
Table 24. Port A–D High Drive Enable Subregisters (PxHDE)
Bit
Field
RESET
R/W
Address
7
6
5
4
3
2
1
0
PHDE7 PHDE6 PHDE5 PHDE4 PHDE3 PHDE2 PHDE1 PHDE0
0
0
0
0
0
0
0
0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
If 04H in Port A–D Address Register, accessible through the Port A–D Control Register
Bit
Description
[7:0]
PHDEx
Port High Drive Enable
0 = The port pin is configured for standard output current drive.
1 = The port pin is configured for high output current drive.
Note: x indicates the specific GPIO port pin number (7–0).
PS025113-1212
GPIO Control Register Definitions