Z8F0830HH020SG Datasheet, PDF (60/257 Pages) Zilog, Inc. – High-Performance 8-Bit Microcontrollers

Z8 Encore!^® F0830 Series
Product Specification
42
Port A–D Alternate Function Subregisters
The Port A–D Alternate Function Subregister is accessed through the Port A–D Control
Register by writing 02H to the Port A–D Address Register. See Table 22 on page 42. The
Port A–D Alternate Function subregisters enable the alternate function selection on pins.
If disabled, the pins function as GPIOs. If enabled, select one of four alternate functions
using Alternate Function Set subregisters 1 and 2, as described in the the Port A–D Alter-
nate Function Set 1 Subregisters section on page 47 and the Port A–D Alternate Function
Set 2 Subregisters section on page 48. See the GPIO Alternate Functions section on
page 34 to determine the alternate functions associated with each port pin.
Caution: Do not enable alternate functions for GPIO port pins for which there is no associated Al-
ternate function. Failure to follow this guideline can result in unpredictable operation.
Table 22. Port A–D Alternate Function Subregisters (PxAF)
Bit
Field
RESET
R/W
Address
7
6
5
4
3
2
1
0
AF7
AF6
AF5
AF4
AF3
AF2
AF1
AF0
00H (Ports A–C); 01H (Port D)
R/W
If 02H in Port A–D Address Register, then accessible through the Port A–D Control Register
Bit
Description
[7:0]
AFx
Port Alternate Function Enable
0 = The port pin is in NORMAL Mode and the DDx bit in the Port A–D Data Direction Subregis-
ter determines the direction of the pin.
1 = The alternate function selected through Alternate function set subregisters is enabled. Port
pin operation is controlled by the Alternate function.
Note: x indicates the specific GPIO port pin number (7–0).
PS025113-1212
GPIO Control Register Definitions