Z8F0830HH020SG Datasheet, PDF (68/257 Pages) Zilog, Inc. – High-Performance 8-Bit Microcontrollers

Z8 Encore!^® F0830 Series
Product Specification
50
Port A–D Output Data Register
The Port A–D Output Data Register, shown in Table 30, controls the output data to the
pins.
Table 30. Port A–D Output Data Register (PxOUT)
Bit
Field
RESET
R/W
Address
7
POUT7
0
R/W
6
POUT6
0
R/W
5
4
3
2
POUT5 POUT4 POUT3 POUT2
0
0
0
0
R/W
R/W
R/W
R/W
FD3H, FD7H, FDBH, FDFH
1
POUT1
0
R/W
0
POUT0
0
R/W
Bit
Description
[7:0]
PxOUT
Port Output Data
These bits contain the data to be driven to the port pins. The values are only driven if the corre-
sponding pin is configured as an output and the pin is not configured for Alternate function
operation.
0 = Drive a logical 0 (Low).
1= Drive a logical 1 (High). High value is not driven if the drain has been disabled by setting the
corresponding port output Control Register bit to 1.
Note: x indicates the specific GPIO port pin number (7–0).
PS025113-1212
GPIO Control Register Definitions