Z8F0830HH020SG Datasheet, PDF (113/257 Pages) Zilog, Inc. – High-Performance 8-Bit Microcontrollers

Z8 Encore!^® F0830 Series
Product Specification
95
Watchdog Timer Control Register Definitions
This section defines the features of the following Watchdog Timer Control registers.
Watchdog Timer Control Register (WDTCTL): see page 95
Watchdog Timer Reload Low Byte Register (WDTL): see page 97
Watchdog Timer Reload Upper Byte Register (WDTU): see page 96
Watchdog Timer Reload High Byte Register (WDTH): see page 96
Watchdog Timer Control Register
The Watchdog Timer Control (WDTCTL) Register is a write-only control register. Writ-
ing the unlock sequence: 55H, AAH to the WDTCTL Register address unlocks the three
Watchdog Timer Reload Byte registers (WDTU, WDTH and WDTL) to allow changes to
the time-out period. These write operations to the WDTCTL Register address have no
effect on the bits in the WDTCTL Register. The locking mechanism prevents spurious
writes to the reload registers.
This register address is shared with the read-only Reset Status Register.
Table 59. Watchdog Timer Control Register (WDTCTL)
Bit
7
6
5
4
3
2
1
0
Field
WDTUNLK
RESET
X
X
X
X
X
X
X
X
R/W
W
W
W
W
W
W
W
W
Address
FF0H
Bit
[7:0]
WDTUNLK
Description
Watchdog Timer Unlock
The user software must write the correct unlocking sequence to this register before it is
allowed to modify the contents of the Watchdog Timer Reload registers.
PS025113-1212
Watchdog Timer Control Register Definitions