Z8F0830HH020SG Datasheet, PDF (55/257 Pages) Zilog, Inc. – High-Performance 8-Bit Microcontrollers

Z8 Encore!^® F0830 Series
Product Specification
37
Table 16. Port Alternate Function Mapping (Continued)
Port
Pin Mnemonic
Port B² PB0 Reserved
Alternate Function Description
Alternate Function
Set Register AFS1
AFS1[0]: 0
ANA0
ADC analog input
AFS1[0]: 1
PB1 Reserved
AFS1[1]: 0
ANA1
ADC analog input
AFS1[1]: 1
PB2 Reserved
AFS1[2]: 0
ANA2
ADC analog input
AFS1[2]: 1
PB3 CLKIN
External input clock
AFS1[3]: 0
ANA3
ADC analog input
AFS1[3]: 1
PB4 Reserved
AFS1[4]: 0
ANA7
ADC analog input
AFS1[4]: 1
PB5 Reserved
AFS1[5]: 0
V_REF
PB6 Reserved
ADC reference voltage
AFS1[5]: 1
AFS1[6]: 0
Reserved
AFS1[6]: 1
PB7 Reserved
AFS1[7]: 0
Reserved
AFS1[7]: 1
Notes:
1. Because there is only a single alternate function for each Port A and Port D (PD0) pin, the Alternate Function
Set registers are not implemented for Port A and Port D (PD0). Enabling alternate function selections (as
described in the Port A–D Alternate Function Subregisters section on page 42) automatically enables the asso-
ciated alternate function.
2. Because there are at most two choices of alternate functions for any Port B pin, the AFS2 Alternate Function Set
Register is implemented but is not used to select the function. Additionally, alternate function selection (as
described in the Port A–D Alternate Function Subregisters section on page 42) must also be enabled.
3. Because there are at most two choices of alternate functions for any Port C pin, the AFS2 Alternate Function Set
Register is implemented but is not used to select the function. Additionally, alternate function selection (as
described in the Port A–D Alternate Function Subregisters section on page 42) must also be enabled.
PS025113-1212
External Clock Setup