Z8F0830HH020SG Datasheet, PDF (12/257 Pages) Zilog, Inc. – High-Performance 8-Bit Microcontrollers

Z8 Encore!^® F0830 Series
Product Specification
xii
List of Tables
Table 1. Z8 Encore! F0830 Series Family Part Selection Guide . . . . . . . . . . . . . . . . . 2
Table 2. Acronyms and Expansions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Table 3. Z8 Encore! F0830 Series Package Options . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Table 4. Signal Descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Table 5. Pin Characteristics (20- and 28-pin Devices) . . . . . . . . . . . . . . . . . . . . . . . 13
Table 6. Z8 Encore! F0830 Series Program Memory Maps . . . . . . . . . . . . . . . . . . . 15
Table 7. Z8 Encore! F0830 Series Flash Memory Information Area Map . . . . . . . . 16
Table 8. Register File Address Map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Table 9. Reset and Stop Mode Recovery Characteristics and Latency . . . . . . . . . . . 22
Table 10. Reset Sources and Resulting Reset Type . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Table 11. Stop Mode Recovery Sources and Resulting Action . . . . . . . . . . . . . . . . . . 27
Table 12. POR Indicator Values . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
Table 13. Reset Status Register (RSTSTAT) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
Table 14. Power Control Register 0 (PWRCTL0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
Table 15. Port Availability by Device and Package Type . . . . . . . . . . . . . . . . . . . . . . 33
Table 16. Port Alternate Function Mapping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
Table 17. GPIO Port Registers and Subregisters . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
Table 18. Port A–D GPIO Address Registers (PxADDR) . . . . . . . . . . . . . . . . . . . . . 40
Table 19. Port Control Subregister Access . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
Table 20. Port A–D Control Registers (PxCTL) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
Table 21. Port A–D Data Direction Subregisters (PxDD) . . . . . . . . . . . . . . . . . . . . . . 41
Table 22. Port A–D Alternate Function Subregisters (PxAF) . . . . . . . . . . . . . . . . . . . 42
Table 23. Port A–D Output Control Subregisters (PxOC) . . . . . . . . . . . . . . . . . . . . . 43
Table 24. Port A–D High Drive Enable Subregisters (PxHDE) . . . . . . . . . . . . . . . . . 44
Table 25. Port A–D Stop Mode Recovery Source Enable Subregisters (PxSMRE) . . 45
Table 26. Port A–D Pull-Up Enable Subregisters (PxPUE) . . . . . . . . . . . . . . . . . . . . 46
Table 27. Port A–D Alternate Function Set 1 Subregisters (PxAFS1) . . . . . . . . . . . . 47
Table 28. Port A–D Alternate Function Set 2 Subregisters (PxAFS2) . . . . . . . . . . . . 48
PS025113-1212
List of Tables