Z8F0830HH020SG Datasheet, PDF (194/257 Pages) Zilog, Inc. – High-Performance 8-Bit Microcontrollers

Z8 Encore!^® F0830 Series
Product Specification
176
Table 113. eZ8 CPU Instruction Summary (Continued)
Assembly
Mnemonic
LDX dst, src
Symbolic Operation
dst ← src
Address
Mode
dst src
r ER
Ir ER
R IRR
IR IRR
r X(rr)
X(rr) r
ER r
ER Ir
IRR R
IRR IR
ER ER
LEA dst, X(src) dst ← src + X
ER IM
r X(r)
MULT dst
dst[15:0] ← 
dst[15:8] * dst[7:0]
rr X(rr)
RR
NOP
OR dst, src
No operation
dst ← dst OR src
r
r
r Ir
RR
R IR
R IM
ORX dst, src dst ← dst OR src
IR IM
ER ER
POP dst
dst ← @SP
SP ← SP + 1
ER IM
R
IR
Note: Flags Notation:
* = Value is a function of the result of the operation.
– = Unaffected.
X = Undefined.
0 = Reset to 0.
1 = Set to 1.
Op
Code(s)
(Hex)
84
85
86
87
88
89
94
95
96
97
E8
E9
98
99
F4
0F
42
43
44
45
46
47
48
49
50
51
Flags
Fetch Instr.
C Z S V D H Cycles Cycles
–––––– 3
2
3
3
3
4
3
5
3
4
3
4
3
2
3
3
3
4
3
5
4
2
4
2
–––––– 3
3
3
5
–––––– 2
8
–––––– 1
2
–* *0–– 2
3
2
4
3
3
3
4
3
3
3
4
–* *0–– 4
3
4
3
–––––– 2
2
2
3
PS025113-1212
eZ8 CPU Instruction Summary