Z8F0830HH020SG Datasheet, PDF (104/257 Pages) Zilog, Inc. – High-Performance 8-Bit Microcontrollers

Z8 Encore!^® F0830 Series
Product Specification
86
Timer 0–1 PWM High and Low Byte Registers
The Timer 0–1 PWM High and Low Byte (TxPWMH and TxPWML) registers, shown in
Tables 54 and 55, control PWM operations. These registers also store the capture values
for the CAPTURE and CAPTURE/COMPARE modes.
Table 54. Timer 0–1 PWM High Byte Register (TxPWMH)
Bit
7
6
5
4
3
2
1
0
Field
PWMH
RESET
0
0
0
0
0
0
0
0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Address
F04H, F0CH
Table 55. Timer 0–1 PWM Low Byte Register (TxPWML)
Bit
7
6
5
4
3
2
1
0
Field
PWML
RESET
0
0
0
0
0
0
0
0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Address
F05H, F0DH
Bit
[7:0]
PWMH,
PWML
Description
Pulse Width Modulator High and Low Bytes
These two bytes, {PWMH[7:0], PWML[7:0]}, form a 16-bit value that is compared to the current
16-bit timer count. When a match occurs, the PWM output changes state. The PWM output
value is set by the TPOL bit in the Timer Control Register (TxCTL1).
The TxPWMH and TxPWML registers also store the 16-bit captured timer value when operat-
ing in capture or CAPTURE/COMPARE modes.
PS025113-1212
Timer Control Register Definitions