Z8F0830HH020SG Datasheet, PDF (172/257 Pages) Zilog, Inc. – High-Performance 8-Bit Microcontrollers

Z8 Encore!^® F0830 Series
Product Specification
154
Caution: It is possible to disable the clock failure detection circuitry as well as all functioning
clock sources. In this case, the Z8 Encore! F0830 Series device ceases functioning and
can only be recovered by power-on-reset.
Oscillator Control Register Definitions
The following section provides the bit definitions for the Oscillator Control Register.
Oscillator Control Register
The Oscillator Control Register (OSCCTL) enables/disables the various oscillator circuits,
enables/disables the failure detection/recovery circuitry and selects the primary oscillator,
which becomes the system clock.
The Oscillator Control Register must be unlocked before writing. Writing the two step
sequence E7H followed by 18H to the Oscillator Control Register unlocks it. The register
is locked at successful completion of a register write to the OSCCTL.
Figure 24 displays the oscillator control clock switching flow. See Table 117 on page 189
to review the waiting times of various oscillator circuits.
Table 99. Oscillator Control Register (OSCCTL)
Bit
7
6
5
4
3
2
1
0
Field
INTEN XTLEN WDTEN POFEN WDFEN
SCKSEL
RESET
1
0
1
0
0
0
0
0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Address
F86H
Bit
[7]
INTEN
[6]
XTLEN
[5]
WDTEN
Description
Internal Precision Oscillator Enable
1 = Internal Precision Oscillator is enabled.
0 = Internal Precision Oscillator is disabled.
Crystal Oscillator Enable
This setting overrides the GPIO register control for PA0 and PA1.
1 = Crystal oscillator is enabled.
0 = Crystal oscillator is disabled.
Watchdog Timer Oscillator Enable
1 = Watchdog Timer Oscillator is enabled.
0 = Watchdog Timer Oscillator is disabled.
PS025113-1212
Oscillator Control Register Definitions