Z8F0830HH020SG Datasheet, PDF (48/257 Pages) Zilog, Inc. – High-Performance 8-Bit Microcontrollers

Z8 Encore!^® F0830 Series
Product Specification
30
Low-Power Modes
The Z8 Encore! F0830 Series products contain power saving features. The highest level of
power reduction is provided by the STOP Mode. The next level of power reduction is pro-
vided by the HALT Mode.
Further power savings can be implemented by disabling the individual peripheral blocks
while in NORMAL Mode.
The user must not enable the pull-up register bits for unused GPIO pins, since these ports
are default output to VSS. Unused GPIOs include those missing on 20-pin packages, as
well as those missing on the ADC-enabled 28-pin packages.
STOP Mode
Executing the eZ8 CPU’s STOP instruction places the device into STOP Mode. In STOP
Mode, the operating characteristics are:
• Primary crystal oscillator and Internal Precision Oscillator are stopped; XIN and
XOUT (if previously enabled) are disabled and PA0/PA1 revert to the states pro-
grammed by the GPIO registers
• System clock is stopped
• eZ8 CPU is stopped
• Program counter (PC) stops incrementing
• Watchdog Timer’s internal RC oscillator continues to operate if enabled by the Oscil-
lator Control Register
• If enabled, the Watchdog Timer logic continues to operate
• If enabled for operation in STOP Mode by the associated Flash option bit, the Voltage
Brown-Out protection circuit continues to operate
• All other on-chip peripherals are idle
To minimize the current in STOP Mode, all GPIO pins that are configured as digital inputs
must be driven to V_DD when the pull-up register bit is enabled or to one of power rail
(V_DD or GND) when the pull-up register bit is disabled. The device can be brought out of
STOP Mode using Stop Mode Recovery. For more information about Stop Mode Recov-
ery, see the Reset and Stop Mode Recovery chapter on page 21.
PS025113-1212
Low-Power Modes