Z8F0830HH020SG Datasheet, PDF (145/257 Pages) Zilog, Inc. – High-Performance 8-Bit Microcontrollers

Z8 Encore!^® F0830 Series
Product Specification
127
Table 80. Trim Bit Data Register (TRMDR)
Bit
7
6
5
4
3
2
1
0
Field
TRMDR: Trim Bit Data
RESET
0
0
0
0
0
0
0
0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Address
FF7H
Flash Option Bit Address Space
The first two bytes of Flash program memory at addresses 0000H and 0001H are reserved
for the user-programmable Flash option bits. See Tables 81 and 82.
Table 81. Flash Option Bits at Program Memory Address 0000H
Bit
7
6
5
4
3
Field
WDT_RES WDT_AO OSC_SEL[1:0] VBO_AO
RESET
U
U
U
U
U
R/W
R/W
R/W
R/W
R/W
R/W
Address
Program Memory 0000H
Note: U = Unchanged by Reset. R/W = Read/Write.
2
FRP
U
R/W
1
Reserved
U
R/W
0
FWP
U
R/W
Bit
[7]
WDT_RES
[6]
WDT_AO
[5:4]
OSC_SEL
Description
Watchdog Timer Reset
0 = Watchdog Timer time-out generates an interrupt request. Interrupts must be globally
enabled for the eZ8 CPU to acknowledge the interrupt request.
1 = Watchdog Timer time-out causes a system reset. This is the default setting for unpro-
grammed (erased) Flash.
Watchdog Timer Always On
0 = On application of system power, Watchdog Timer is automatically enabled. Watchdog
Timer cannot be disabled.
1 = Watchdog Timer is enabled on execution of the WDT instruction. Once enabled, the
Watchdog Timer can only be disabled by a reset. This is the default setting for unpro-
grammed (erased) Flash.
OSCILLATOR Mode Selection
00 = On-chip oscillator configured for use with external RC networks (<4 MHz).
01 = Minimum power for use with very low frequency crystals (32 kHz to 1.0 MHz).
10 = Medium power for use with medium frequency crystals or ceramic resonators (0.5 MHz
to 5.0 MHz).
11 = Maximum power for use with high frequency crystals (5.0 MHz to 20.0 MHz). This is the
default setting for unprogrammed (erased) Flash.
PS025113-1212
Flash Option Bit Address Space