Z8F0830HH020SG Datasheet, PDF (118/257 Pages) Zilog, Inc. – High-Performance 8-Bit Microcontrollers

Z8 Encore!^® F0830 Series
Product Specification
100
ADC Timing
Each ADC measurement consists of three phases:
1. Input sampling (programmable, minimum of 1.0µs)
2. Sample-and-hold amplifier settling (programmable, minimum of 0.5µs)
3. Conversion is 13 ADCLK cycles
Figures 12 and 13 display the timing of an ADC conversion.
START
SAMPLE/HOLD
1.0µs min
sample period
conversion period
Programable
settling period
BUSY
13 clocks
convert period
Figure 12. ADC Timing Diagram
ADC Clock
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17
BUSY
13 clocks
convert period
Figure 13. ADC Convert Timing
PS025113-1212
Operation