Z8F0830HH020SG Datasheet, PDF (52/257 Pages) Zilog, Inc. – High-Performance 8-Bit Microcontrollers

Z8 Encore!^® F0830 Series
Product Specification
34
Architecture
Figure 8 displays a simplified block diagram of a GPIO port pin. In this figure, the ability
to accommodate alternate functions and variable port current drive strength is not dis-
played.
Port Input
Data Register
QD
Schmitt Trigger
QD
Port Output
Data Register
DATA
Bus
DQ
System
Clock
System
Clock
Port Output Control
VDD
Port
Pin
Port Data Direction
Figure 8. GPIO Port Pin Block Diagram
GND
GPIO Alternate Functions
Many of the GPIO port pins can be used for general purpose input/output and access to on-
chip peripheral functions such as the timers and serial communication devices. The Port
A–D Alternate Function subregisters configure these pins for either GPIO or Alternate
function operation. When a pin is configured for Alternate function, control of the port pin
direction (input/output) is passed from the Port A–D data direction registers to the Alter-
nate function assigned to this pin. Table 16 on page 36 lists the alternate functions possible
with each port pin. The alternate function associated at a pin is defined through Alternate
Function subregisters AFS1 and AFS2.
The crystal oscillator functionality is not controlled by the GPIO block. When the crystal
oscillator is enabled in the oscillator control block, the GPIO functionality of PA0 and PA1
is overridden. In that case, pins PA0 and PA1 functions as input and output for the crystal
oscillator.
PS025113-1212
Architecture