Z8F0830HH020SG Datasheet, PDF (58/257 Pages) Zilog, Inc. – High-Performance 8-Bit Microcontrollers

Z8 Encore!^® F0830 Series
Product Specification
40
Port A–D Address Registers
The Port A–D Address registers select the GPIO port functionality accessible through the
Port A–D Control registers. The Port A–D Address and Control registers combine to pro-
vide access to all GPIO port controls; see Tables 18 and 19.
Table 18. Port A–D GPIO Address Registers (PxADDR)
Bit
7
6
5
4
3
2
1
0
Field
PADDR[7:0]
RESET
00H
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Address
FD0H, FD4H, FD8H, FDCH
Bit
[7:0]
PADDR
Description
Port Address
The port address selects one of the subregisters accessible through the Port Control Register.
Table 19. Port Control Subregister Access
PADDR[7:0] Port Control Subregister accessible using the Port A–D Control registers
00H
No function. Provides some protection against accidental port reconfiguration.
01H
Data Direction
02H
Alternate Function
03H
Output Control (open-drain)
04H
High Drive Enable
05H
Stop Mode Recovery Source Enable
06H
Pull-Up Enable
07H
Alternate Function Set 1
08H
Alternate Function Set 2
09H–FFH No function
PS025113-1212
GPIO Control Register Definitions