Z8F6421PM020SC Datasheet, PDF (66/299 Pages) Zilog, Inc. – High Performance 8-Bit Microcontrollers Z8 Encore-R 64K Series

Z8 Encore!^® 64K Series
Product Specification
46
tion. Following Power-On Reset, the POR status bit in the Watch-Dog Timer Control
(WDTCTL) register is set to 1. Figure 9 illustrates Voltage Brown-Out operation. Refer to
the Electrical Characteristics chapter for the VBO and POR threshold voltages (V_VBO
and V_POR).
The Voltage Brown-Out circuit can be either enabled or disabled during STOP mode.
Operation during STOP mode is set by the VBO_AO Option Bit. Refer to the Option Bits
chapter for information on configuring VBO_AO.
VCC = 3.3V
V_POR
V_VBO
Program
Execution
Voltage
Brownout
VCC = 3.3V
Program
Execution
WDT Clock
Primary
Oscillator
Internal RESET
Signal
POR
XTAL
Counter Delay Counter Delay
Figure 9. Voltage Brown-Out Reset Operation
Watch-Dog Timer Reset
If the device is in normal or HALT mode, the Watch-Dog Timer can initiate a System
Reset at time-out if the WDT_RES Option Bit is set to 1. This capability is the default
(unprogrammed) setting of the WDT_RES Option Bit. The WDT status bit in the WDT Con-
trol register is set to signify that the reset was initiated by the Watch-Dog Timer.
External Pin Reset
The RESET pin has a Schmitt-triggered input, an internal pull-up, an analog filter and a
digital filter to reject noise. Once the RESET pin is asserted for at least 4 system clock
PS019915-1005
Reset and STOP Mode Recovery