Z8F6421PM020SC Datasheet, PDF (63/299 Pages) Zilog, Inc. – High Performance 8-Bit Microcontrollers Z8 Encore-R 64K Series

Z8 Encore!^® 64K Series
Product Specification
43
Reset and STOP Mode Recovery
Overview
The Reset Controller within the Z8 Encore!^® 64K Series controls Reset and STOP Mode
Recovery operation. In typical operation, the following events cause a Reset to occur:
• Power-On Reset (POR)
• Voltage Brown-Out (VBO)
• Watch-Dog Timer time-out (when configured via the WDT_RES Option Bit to initiate
a Reset)
• External RESET pin assertion
• On-Chip Debugger initiated Reset (OCDCTL[0] set to 1)
When the 64K Series devices are in STOP mode, a STOP Mode Recovery is initiated by
either of the following:
• Watch-Dog Timer time-out
• GPIO Port input pin transition on an enabled STOP Mode Recovery source
• DBG pin driven Low
Reset Types
The 64K Series provides two different types of reset operation (System Reset and STOP
Mode Recovery). The type of Reset is a function of both the current operating mode of the
64K Series devices and the source of the Reset. Table 8 lists the types of Reset and their
operating characteristics.
Table 8. Reset and STOP Mode Recovery Characteristics and Latency
Reset Type
System Reset
STOP Mode
Recovery
Control Registers
Reset (as applicable)
Unaffected, except
WDT_CTL register
Reset Characteristics and Latency
eZ8 CPU Reset Latency (Delay)
Reset 66 WDT Oscillator cycles + 16 System Clock cycles
Reset 66 WDT Oscillator cycles + 16 System Clock cycles
PS019915-1005
Reset and STOP Mode Recovery