Z8F6421PM020SC Datasheet, PDF (262/299 Pages) Zilog, Inc. – High Performance 8-Bit Microcontrollers Z8 Encore-R 64K Series

Z8 Encore!^® 64K Series
Product Specification
242
Table 131. Rotate and Shift Instructions
Mnemonic
BSWAP
RL
RLC
RR
RRC
SRA
SRL
SWAP
Operands
dst
dst
dst
dst
dst
dst
dst
dst
Instruction
Bit Swap
Rotate Left
Rotate Left through Carry
Rotate Right
Rotate Right through Carry
Shift Right Arithmetic
Shift Right Logical
Swap Nibbles
eZ8 CPU Instruction Summary
Table 132 summarizes the eZ8 CPU instructions. The table identifies the addressing
modes employed by the instruction, the effect upon the Flags register, the number of CPU
clock cycles required for the instruction fetch, and the number of CPU clock cycles
required for the instruction execution.
.
Table 132. eZ8 CPU Instruction Summary
Assembly
Mnemonic
ADC dst, src
ADCX dst, src
Flags Notation:
Symbolic Operation
Address Mode
Opcode(s)
Flags
Fetch Instr.
dst src (Hex) C Z S V D H Cycles Cycles
dst ← dst + src + C
r
r
12
****0* 2
3
r
Ir
13
2
4
R
R
14
3
3
R IR
15
3
4
R IM
16
3
3
IR IM
17
3
4
dst ← dst + src + C
ER ER
18
****0* 4
3
ER IM
19
4
3
* = Value is a function of the result of the operation.
- = Unaffected
X = Undefined
0 = Reset to 0
1 = Set to 1
PS019915-1005
eZ8 CPU Instruction Set