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Z8F6421PM020SC Datasheet, PDF (164/299 Pages) Zilog, Inc. – High Performance 8-Bit Microcontrollers Z8 Encore-R 64K Series
Z8 Encore!® 64K Series
Product Specification
144
ing the I2C Data register. Once the I2C data register has been read, the I2C reads the next
data byte.
Address Only Transaction with a 7-bit Address
In the situation where software determines if a slave with a 7-bit address is responding
without sending or receiving data, a transaction can be done which only consists of an
address phase. Figure 28 illustrates this “address only” transaction to determine if a slave
with a 7-bit address will acknowledge. As an example, this transaction can be used after a
“write” has been done to a EEPROM to determine when the EEPROM completes its inter-
nal write operation and is once again responding to I2C transactions. If the slave does not
Acknowledge, the transaction can be repeated until the slave does Acknowledge.
S Slave Address W = 0 A/A P
Figure 28. 7-Bit Address Only Transaction Format
The procedure for an address only transaction to a 7-bit addressed slave is as follows:
1. Software asserts the IEN bit in the I2C Control register.
2. Software asserts the TXI bit of the I2C Control register to enable Transmit interrupts.
3. The I2C interrupt asserts, because the I2C Data register is empty (TDRE = 1)
4. Software responds to the TDRE bit by writing a 7-bit slave address plus write bit (=0)
to the I2C Data register. As an alternative this could be a read operation instead of a
write operation.
5. Software sets the START and STOP bits of the I2C Control register and clears the TXI
bit.
6. The I2C Controller sends the START condition to the I2C slave.
7. The I2C Controller loads the I2C Shift register with the contents of the I2C Data
register.
8. Software polls the STOP bit of the I2C Control register. Hardware deasserts the STOP
bit when the address only transaction is completed.
9. Software checks the ACK bit of the I2C Status register. If the slave acknowledged,
the ACK bit is = 1. If the slave does not acknowledge, the ACK bit is = 0. The NCKI
interrupt does not occur in the not acknowledge case because the STOP bit was set.
PS019915-1005
I2C Controller