Z8F6421PM020SC Datasheet, PDF (215/299 Pages) Zilog, Inc. – High Performance 8-Bit Microcontrollers Z8 Encore-R 64K Series

Z8 Encore!^® 64K Series
Product Specification
195
RS-232 TX
RS-232 RX
RS-232
Transceiver
V_DD
Open-Drain
Buffer
10K Ohm
DBG Pin
Figure 38. Interfacing the On-Chip Debugger’s DBG Pin with an RS-232 Interface (2)
Debug Mode
The operating characteristics of the 64K Series devices in DEBUG mode are:
• The eZ8 CPU fetch unit stops, idling the eZ8 CPU, unless directed by the OCD to
execute specific instructions.
• The system clock operates unless in STOP mode.
• All enabled on-chip peripherals operate unless in STOP mode.
• Automatically exits HALT mode.
• Constantly refreshes the Watch-Dog Timer, if enabled.
Entering Debug Mode
The device enters DEBUG mode following any of the following operations:
• Writing the DBGMODE bit in the OCD Control Register to 1 using the OCD interface.
• eZ8 CPU execution of a BRK (Breakpoint) instruction (when enabled).
• If the DBG pin is Low when the device exits Reset, the On-Chip Debugger
automatically puts the device into DEBUG mode.
Exiting Debug Mode
The device exits DEBUG mode following any of the following operations:
• Clearing the DBGMODE bit in the OCD Control Register to 0.
• Power-on reset
• Voltage Brown Out reset
PS019915-1005
On-Chip Debugger