Z8F6421PM020SC Datasheet, PDF (165/299 Pages) Zilog, Inc. – High Performance 8-Bit Microcontrollers Z8 Encore-R 64K Series

Z8 Encore!^® 64K Series
Product Specification
145
Write Transaction with a 7-Bit Address
Figure 29 illustrates the data transfer format for a 7-bit addressed slave. Shaded regions
indicate data transferred from the I²C Controller to slaves and unshaded regions indicate
data transferred from the slaves to the I²C Controller.
S Slave Address W = 0 A Data A Data A Data A/A P/S
Figure 29. 7-Bit Addressed Slave Data Transfer Format
The procedure for a transmit operation to a 7-bit addressed slave is as follows:
1. Software asserts the IEN bit in the I²C Control register.
2. Software asserts the TXI bit of the I²C Control register to enable Transmit interrupts.
3. The I²C interrupt asserts, because the I²C Data register is empty
4. Software responds to the TDRE bit by writing a 7-bit slave address plus write bit (=0)
to the I²C Data register.
5. Software asserts the START bit of the I²C Control register.
6. The I²C Controller sends the START condition to the I²C slave.
7. The I²C Controller loads the I²C Shift register with the contents of the I²C Data
register.
8. After one bit of address has been shifted out by the SDA signal, the Transmit interrupt
is asserted (TDRE = 1).
9. Software responds by writing the transmit data into the I²C Data register.
10. The I²C Controller shifts the rest of the address and write bit out by the SDA signal.
11. If the I²C slave sends an acknowledge (by pulling the SDA signal low) during the next
high period of SCL the I²C Controller sets the ACK bit in the I²C Status register.
Continue with step 12.
If the slave does not acknowledge, the Not Acknowledge interrupt occurs (NCKI bit is
set in the Status register, ACK bit is cleared). Software responds to the Not
Acknowledge interrupt by setting the STOP and FLUSH bits and clearing the TXI bit.
The I2C Controller sends the STOP condition on the bus and clears the STOP and
NCKI bits. The transaction is complete (ignore following steps).
12. The I²C Controller loads the contents of the I²C Shift register with the contents of the
I²C Data register.
PS019915-1005
I2C Controller