Z8F6421PM020SC Datasheet, PDF (263/299 Pages) Zilog, Inc. – High Performance 8-Bit Microcontrollers Z8 Encore-R 64K Series

Z8 Encore!^® 64K Series
Product Specification
243
Table 132. eZ8 CPU Instruction Summary (Continued)
Assembly
Mnemonic
Symbolic Operation
Address Mode
Opcode(s)
Flags
Fetch Instr.
dst src (Hex) C Z S V D H Cycles Cycles
ADD dst, src
dst ← dst + src
r
r
02
****0* 2
3
r
Ir
03
2
4
R
R
04
3
3
R IR
05
3
4
R IM
06
3
3
IR IM
07
3
4
ADDX dst, src dst ← dst + src
ER ER
08
****0* 4
3
ER IM
09
4
3
AND dst, src
dst ← dst AND src
r
r
52
-**0- - 2
3
r
Ir
53
2
4
R
R
54
3
3
R IR
55
3
4
R IM
56
3
3
IR IM
57
3
4
ANDX dst, src dst ← dst AND src
ER ER
58
-**0- - 4
3
ER IM
59
4
3
ATM
Block all interrupt and
DMA requests during
execution of the next 3
instructions
2F
------ 1
2
BCLR bit, dst dst[bit] ← 0
r
E2
-**0- - 2
2
BIT p, bit, dst dst[bit] ← p
r
E2
-**0- - 2
2
BRK
Debugger Break
00
------ 1
1
BSET bit, dst
dst[bit] ← 1
r
E2
-**0- - 2
2
BSWAP dst
dst[7:0] ← dst[0:7]
R
D5 X * * 0 - - 2
2
BTJ p, bit, src, dst if src[bit] = p
PC ← PC + X
r
F6
------ 3
3
Ir
F7
3
4
Flags Notation:
* = Value is a function of the result of the operation.
- = Unaffected
X = Undefined
0 = Reset to 0
1 = Set to 1
PS019915-1005
eZ8 CPU Instruction Set