Z8F6421PM020SC Datasheet, PDF (249/299 Pages) Zilog, Inc. – High Performance 8-Bit Microcontrollers Z8 Encore-R 64K Series

Z8 Encore!^® 64K Series
Product Specification
229
SPI Slave Mode Timing
Figure 54 and Table 117 provide timing information for the SPI slave mode pins. Timing
is shown with SCK rising edge used to source MISO output data, SCK falling edge used to
sample MOSI input data.
SCK
T1
MISO
(Output)
MOSI
(Input)
T4
SS
(Input)
Output Data
T2 T3
Input Data
Figure 54. SPI Slave Mode Timing
Table 117. SPI Slave Mode Timing
Parameter
SPI Slave
T₁
Abbreviation
SCK (transmit edge) to MISO output Valid Delay
T₂
MOSI input to SCK (receive edge) Setup Time
T₃
MOSI input to SCK (receive edge) Hold Time
T₄
SS input assertion to SCK setup
Delay (ns)
Min
Max
2 * Xin
period
0
3 * Xin
period
1 * Xin
period
3 * Xin
period +
20 nsec
PS019915-1005
Electrical Characteristics