Z8F6421PM020SC Datasheet, PDF (128/299 Pages) Zilog, Inc. – High Performance 8-Bit Microcontrollers Z8 Encore-R 64K Series

Z8 Encore!^® 64K Series
Product Specification
108
Receiver
Ready
Receiver
Interrupt
Read Status
No
Errors?
Yes
Read Data which
clears RDA bit and
resets error bits
Read Data
Discard Data
Figure 18. UART Receiver Interrupt Service Routine Flow
Baud Rate Generator Interrupts
If the Baud Rate Generator (BRG) interrupt enable is set, the UART Receiver interrupt
asserts when the UART Baud Rate Generator reloads. This action allows the Baud Rate
Generator to function as an additional counter if the UART functionality is not employed.
UART Baud Rate Generator
The UART Baud Rate Generator creates a lower frequency baud rate clock for data trans-
mission. The input to the Baud Rate Generator is the system clock. The UART Baud Rate
High and Low Byte registers combine to create a 16-bit baud rate divisor value
PS019915-1005
UART