Z8F6421PM020SC Datasheet, PDF (170/299 Pages) Zilog, Inc. – High Performance 8-Bit Microcontrollers Z8 Encore-R 64K Series

Z8 Encore!^® 64K Series
Product Specification
150
4. The I²C Controller sends the START condition.
5. The I²C Controller shifts the address and read bit out the SDA signal.
6. If the I²C slave acknowledges the address by pulling the SDA signal Low during the
next high period of SCL, the I²C Controller sets the ACK bit in the I²C Status register.
Continue with step 7.
If the slave does not acknowledge, the Not Acknowledge interrupt occurs (NCKI bit is
set in the Status register, ACK bit is cleared). Software responds to the Not
Acknowledge interrupt by setting the STOP bit and clearing the TXI bit. The I2C
Controller sends the STOP condition on the bus and clears the STOP and NCKI bits.
The transaction is complete (ignore the following steps).
7. The I²C Controller shifts in the byte of data from the I²C slave on the SDA signal. The
I²C Controller sends a Not Acknowledge to the I²C slave if the NAK bit is set (last
byte), else it sends an Acknowledge.
8. The I²C Controller asserts the Receive interrupt (RDRF bit set in the Status register).
9. Software responds by reading the I²C Data register which clears the RDRF bit. If there
is only one more byte to receive, set the NAK bit of the I²C Control register.
10. If there are more bytes to transfer, return to step 7.
11. After the last byte is shifted in, a Not Acknowledge interrupt is generated by the I²C
Controller.
12. Software responds by setting the STOP bit of the I²C Control register.
13. A STOP condition is sent to the I²C slave, the STOP and NCKI bits are cleared.
Read Transaction with a 10-Bit Address
Figure 33 illustrates the read transaction format for a 10-bit addressed slave. The shaded
regions indicate data transferred from the I²C Controller to slaves and unshaded regions
indicate data transferred from the slaves to the I²C Controller.
S
Slave Address
1st 7 bits
W=0 A
Slave Address
2nd Byte
AS
Slave Address
1st 7 bits
R=1 A Data A Data A P
Figure 33. Receive Data Format for a 10-Bit Addressed Slave
The first seven bits transmitted in the first byte are 11110XX. The two bits XX are the two
most-significant bits of the 10-bit address. The lowest bit of the first byte transferred is the
write control bit.
The data transfer procedure for a read operation to a 10-bit addressed slave is as follows:
PS019915-1005
I2C Controller