Z8F6421PM020SC Datasheet, PDF (169/299 Pages) Zilog, Inc. – High Performance 8-Bit Microcontrollers Z8 Encore-R 64K Series

Z8 Encore!^® 64K Series
Product Specification
149
16. If the I²C slave sends an acknowledge by pulling the SDA signal low during the next
high period of SCL, the I²C Controller sets the ACK bit in the I²C Status register.
Continue with step 17.
If the slave does not acknowledge the second address byte or one of the data bytes, the
I²C Controller sets the NCKI bit and clears the ACK bit in the I²C Status register.
Software responds to the Not Acknowledge interrupt by setting the STOP and FLUSH
bits and clearing the TXI bit. The I2C Controller sends the STOP condition on the bus
and clears the STOP and NCKI bits. The transaction is complete (ignore the following
steps).
17. The I²C Controller shifts the data out by the SDA signal. After the first bit is sent, the
Transmit interrupt is asserted.
18. If more bytes remain to be sent, return to step 14.
19. If the last byte is currently being sent, software sets the STOP bit of the I²C Control
register (or START bit to initiate a new transaction). In the STOP case, software also
clears the TXI bit of the I²C Control register at the same time.
20. The I²C Controller completes transmission of the last data byte on the SDA signal.
21. The slave may either Acknowledge or Not Acknowledge the last byte. Because either
the STOP or START bit is already set, the NCKI interrupt does not occur.
22. The I²C Controller sends the STOP (or RESTART) condition to the I²C bus and clears
the STOP (or START) bit.
Read Transaction with a 7-Bit Address
Figure 32 illustrates the data transfer format for a read operation to a 7-bit addressed slave.
The shaded regions indicate data transferred from the I²C Controller to slaves and
unshaded regions indicate data transferred from the slaves to the I²C Controller.
S
Slave Address
R = 1 A Data A Data A P/S
Figure 32. Receive Data Transfer Format for a 7-Bit Addressed Slave
The procedure for a read operation to a 7-bit addressed slave is as follows:
1. Software writes the I²C Data register with a 7-bit slave address plus the read bit (=1).
2. Software asserts the START bit of the I²C Control register.
3. If this is a single byte transfer, Software asserts the NAK bit of the I²C Control register
so that after the first byte of data has been read by the I²C Controller, a Not
Acknowledge is sent to the I²C slave.
PS019915-1005
I2C Controller