Z8F6421PM020SC Datasheet, PDF (135/299 Pages) Zilog, Inc. – High Performance 8-Bit Microcontrollers Z8 Encore-R 64K Series

Z8 Encore!^® 64K Series
Product Specification
115
IREN—Infrared Encoder/Decoder Enable
0 = Infrared Encoder/Decoder is disabled. UART operates normally operation.
1 = Infrared Encoder/Decoder is enabled. The UART transmits and receives data through
the Infrared Encoder/Decoder.
UART Address Compare Register
The UART Address Compare register (Table 57) stores the multi-node network address of
the UART. When the MPMD[1] bit of UART Control Register 0 is set, all incoming
address bytes are compared to the value stored in the Address Compare register. Receive
interrupts and RDA assertions only occur in the event of a match.
Table 57. UART Address Compare Register (UxADDR)
BITS
7
6
5
4
3
2
1
0
FIELD
RESET
R/W
ADDR
COMP_ADDR
0
R/W
F45H and F4DH
COMP_ADDR—Compare Address
This 8-bit value is compared to the incoming address bytes.
UART Baud Rate High and Low Byte Registers
The UART Baud Rate High and Low Byte registers (Tables 58 and 59) combine to create
a 16-bit baud rate divisor value (BRG[15:0]) that sets the data transmission rate (baud
rate) of the UART. To configure the Baud Rate Generator as a timer with interrupt on
time-out, complete the following procedure:
1. Disable the UART by clearing the REN and TEN bits in the UART Control 0 register
to 0.
2. Load the desired 16-bit count value into the UART Baud Rate High and Low Byte
registers.
3. Enable the Baud Rate Generator timer function and associated interrupt by setting the
BRGCTL bit in the UART Control 1 register to 1.
When congured as a general purpose timer, the UART BRG interrupt interval is calculated
using the following equation:
UART BRG Interrupt Interval (s) = System Clock Period (s) ×BRG[15:0] ]
PS019915-1005
UART