Z8F6421PM020SC Datasheet, PDF (42/299 Pages) Zilog, Inc. – High Performance 8-Bit Microcontrollers Z8 Encore-R 64K Series

Z8 Encore!^® 64K Series
Product Specification
22
Table 7. 64K Series Register File Address Map (Continued)
Address (Hex) Register Description
Timer 3 (unavailable in the 44-pin packages)
F18
Timer 3 High Byte
F19
Timer 3 Low Byte
F1A
Timer 3 Reload High Byte
F1B
Timer 3 Reload Low Byte
F1C
Timer 3 PWM High Byte
F1D
Timer 3 PWM Low Byte
F1E
Timer 3 Control 0
F1F
20-3F
Timer 3 Control 1
Reserved
UART 0
F40
UART0 Transmit Data
UART0 Receive Data
F41
UART0 Status 0
F42
UART0 Control 0
F43
UART0 Control 1
F44
UART0 Status 1
F45
UART0 Address Compare Register
F46
UART0 Baud Rate High Byte
F47
UART0 Baud Rate Low Byte
UART 1
F48
UART1 Transmit Data
UART1 Receive Data
F49
UART1 Status 0
F4A
UART1 Control 0
F4B
UART1 Control 1
F4C
UART1 Status 1
F4D
UART1 Address Compare Register
F4E
F4F
I²C
F50
F51
F52
F53
F54
F55
F56
F57-F5F
UART1 Baud Rate High Byte
UART1 Baud Rate Low Byte
I²C Data
I²C Status
I²C Control
I²C Baud Rate High Byte
I²C Baud Rate Low Byte
I²C Diagnostic State
I²C Diagnostic Control
Reserved
Mnemonic
T3H
T3L
T3RH
T3RL
T3PWMH
T3PWML
T3CTL0
T3CTL1
—
U0TXD
U0RXD
U0STAT0
U0CTL0
U0CTL1
U0STAT1
U0ADDR
U0BRH
U0BRL
U1TXD
U1RXD
U1STAT0
U1CTL0
U1CTL1
U1STAT1
U1ADDR
U1BRH
U1BRL
I2CDATA
I2CSTAT
I2CCTL
I2CBRH
I2CBRL
I2CDST
I2CDIAG
—
Reset (Hex) Page #
00
84
01
84
FF
85
FF
85
00
87
00
87
00
88
00
88
XX
XX
109
XX
110
0000011Xb 110
00
112
00
112
00
110
00
115
FF
115
FF
115
XX
109
XX
110
0000011Xb 110
00
112
00
112
00
110
00
115
FF
115
FF
115
00
152
80
153
00
155
FF
156
FF
156
C0
158
00
160
XX
XX=Undefined
PS019915-1005
Register File Address Map