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Z8F6421PM020SC Datasheet, PDF (174/299 Pages) Zilog, Inc. – High Performance 8-Bit Microcontrollers Z8 Encore-R 64K Series
Z8 Encore!® 64K Series
Product Specification
154
last byte transmitted or received. It is not reset at the beginning of each transaction and is
not reset when this register is read.
Caution:
Software must be cautious in making decisions based on this bit within a
transaction because software cannot tell when the bit is updated by hard-
ware. In the case of write transactions, the I2C pauses at the beginning of
the Acknowledge cycle if the next transmit data or address byte has not
been written (TDRE = 1) and STOP and START = 0. In this case the ACK
bit is not updated until the transmit interrupt is serviced and the Acknowl-
edge cycle for the previous byte completes. Refer to Address Only Trans-
action with a 7-bit Address on page 144 and Address Only Transaction
with a 10-bit Address on page 146 for examples of how the ACK bit can
be used.
10B—10-Bit Address
This bit indicates whether a 10- or 7-bit address is being transmitted. After the START bit
is set, if the five most-significant bits of the address are 11110B, this bit is set. When set,
it is reset once the first byte of the address has been sent.
RD—Read
This bit indicates the direction of transfer of the data. It is active high during a read. The
status of this bit is determined by the least-significant bit of the I2C Shift register after the
START bit is set.
TAS—Transmit Address State
This bit is active high while the address is being shifted out of the I2C Shift register.
DSS—Data Shift State
This bit is active high while data is being shifted to or from the I2C Shift register.
NCKI—NACK Interrupt
This bit is set high when a Not Acknowledge condition is received or sent and neither the
START nor the STOP bit is active. When set, this bit generates an interrupt that can only
be cleared by setting the START or STOP bit, allowing the user to specify whether he
wants to perform a STOP or a repeated START.
PS019915-1005
I2C Controller