Z8F6421PM020SC Datasheet, PDF (132/299 Pages) Zilog, Inc. – High Performance 8-Bit Microcontrollers Z8 Encore-R 64K Series

Z8 Encore!^® 64K Series
Product Specification
112
UART Status 1 Register
This register contains multiprocessor control and status bits.
Table 54. UART Status 1 Register (UxSTAT1)
BITS
7
FIELD
RESET
R/W
ADDR
6
5
4
3
2
Reserved
0
R
R/W
F44H and F4CH
1
NEWFRM
0
MPRX
R
Reserved—Must be 0.
NEWFRM—Status bit denoting the start of a new frame. Reading the UART Receive
Data register resets this bit to 0.
0 = The current byte is not the first data byte of a new frame.
1 = The current byte is the first data byte of a new frame.
MPRX—Multiprocessor Receive
Returns the value of the last multiprocessor bit received. Reading from the UART Receive
Data register resets this bit to 0.
UART Control 0 and Control 1 Registers
The UART Control 0 and Control 1 registers (Tables 55 and 56) configure the properties
of the UART’s transmit and receive operations. The UART Control registers must not
been written while the UART is enabled.
Table 55. UART Control 0 Register (UxCTL0)
BITS
7
6
5
FIELD ^TEN
REN
CTSE
RESET
R/W
ADDR
4
3
PEN
PSEL
0
R/W
F42H and F4AH
2
SBRK
1
STOP
0
LBEN
TEN—Transmit Enable
This bit enables or disables the transmitter. The enable is also controlled by the CTS signal
and the CTSE bit. If the CTS signal is low and the CTSE bit is 1, the transmitter is
PS019915-1005
UART