Z8F6421PM020SC Datasheet, PDF (56/299 Pages) Zilog, Inc. – High Performance 8-Bit Microcontrollers Z8 Encore-R 64K Series

Z8 Encore!^® 64K Series
Z8 Encore!
36
DMA1 I/O Address
DMA1IO (FB9H - Read/Write)
D7 D6 D5 D4 D3 D2 D1 D0
DMA1 Peripheral Register Address
Low byte of on-chip peripheral control
registers on Register File page FH
DMA1 Address High Nibble
DMA1H (FBAH - Read/Write)
D7 D6 D5 D4 D3 D2 D1 D0
DMA1 Start Address [11:8]
DMA1 End Address [11:8]
DMA1 Start/Current Address Low Byte
DMA1START (FBBH - Read/Write)
D7 D6 D5 D4 D3 D2 D1 D0
DMA1 Start Address [7:0]
DMA1 End Address Low Byte
DMA1END (FBCH - Read/Write)
D7 D6 D5 D4 D3 D2 D1 D0
DMA1 End Address [7:0]
DMA_ADC Address
DMAA_ADDR (FBDH - Read/Write)
D7 D6 D5 D4 D3 D2 D1 D0
Reserved
DMA_ADC Address
DMA_ADC Control
DMAACTL (FBEH - Read/Write)
D7 D6 D5 D4 D3 D2 D1 D0
ADC Analog Input Number
0000 = Analog input 0 updated
0001 = Analog input 0-1 updated
0010 = Analog input 0-2 updated
0011 = Analog input 0-3 updated
0100 = Analog input 0-4 updated
0101 = Analog input 0-5 updated
0100 = Analog input 0-6 updated
0101 = Analog input 0-7 updated
1000 = Analog input 0-8 updated
1001 = Analog input 0-9 updated
1010 = Analog input 0-10 updated
1011 = Analog inputs 0-11 updated
11xx = Reserved
Reserved
Interrupt request enable
0 = DMA_ADC does not generate
interrupt requests
1 = DMA_ADC generates interrupt
requests after last analog input
DMA_ADC Enable
0 = DMA_ADC is disabled
1 = DMA_ADC is enabled
DMA Status
DMAA_STAT (FBFH - Read Only)
D7 D6 D5 D4 D3 D2 D1 D0
DMA0 Interrupt Request Indicator
0 = DMA0 is not the source of the IRQ
1 = DMA0 is the source of the IRQ
DMA1 Interrupt Request Indicator
0 = DMA1 is not the source of the IRQ
1 = DMA1 is the source of the IRQ
DMA_ADC Interrupt Request Indicator
0 = DMA_ADC is not the source of the
IRQ
1 = DMA_ADC is the source of the
IRQ
Reserved
Current ADC analog input
Identifies the analog input the ADC is
currently converting
PS019915-1005
Control Register Summary