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Z8F6421PM020SC Datasheet, PDF (133/299 Pages) Zilog, Inc. – High Performance 8-Bit Microcontrollers Z8 Encore-R 64K Series | |||
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Z8 Encore!® 64K Series
Product Specification
113
enabled.
0 = Transmitter disabled.
1 = Transmitter enabled.
RENâReceive Enable
This bit enables or disables the receiver.
0 = Receiver disabled.
1 = Receiver enabled.
CTSEâCTS Enable
0 = The CTS signal has no effect on the transmitter.
1 = The UART recognizes the CTS signal as an enable control from the transmitter.
PENâParity Enable
This bit enables or disables parity. Even or odd is determined by the PSEL bit. It is over-
ridden by the MPEN bit.
0 = Parity is disabled.
1 = The transmitter sends data with an additional parity bit and the receiver receives an
additional parity bit.
PSELâParity Select
0 = Even parity is transmitted and expected on all received data.
1 = Odd parity is transmitted and expected on all received data.
SBRKâSend Break
This bit pauses or breaks data transmission. Sending a break interrupts any transmission in
progress, so ensure that the transmitter has finished sending data before setting this bit.
0 = No break is sent.
1 = The output of the transmitter is zero.
STOPâStop Bit Select
0 = The transmitter sends one stop bit.
1 = The transmitter sends two stop bits.
LBENâLoop Back Enable
0 = Normal operation.
1 = All transmitted data is looped back to the receiver.
Table 56. UART Control 1 Register (UxCTL1)
BITS
7
FIELD MPMD[1]
6
MPEN
5
MPMD[0]
RESET
R/W
ADDR
4
MPBT
3
DEPOL
0
R/W
F43H and F4BH
2
BRGCTL
1
RDAIRQ
0
IREN
PS019915-1005
UART
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