CP3BT23 Datasheet, PDF (9/260 Pages) Texas Instruments – CP3BT23 Reprogrammable Connectivity Processor with Bluetooth and Dual CAN Interfaces

4.0 Signal Descriptions
12 MHz Crystal
or Ext. Clock
32.768 kHz
Crystal
X1CKI/BBCLK
X1CKO
X2CKI
X2CKO
PB[7:0]
8
PC[7:0]
8
Power
Supply
Chip Reset
1
AVCC
1
AGND
1
ADVCC
1 ^ADGND CP3BT23
6 ^VCC _(LQFP-128)
6
GND
15
IOVCC
14
IOGND
RFDATA
PGO/RFSYNC
PG1/RFCE
RESET
PG3/SCLK
PG4/SDAT
12 MHz Crystal
GPIO _{or Ext. Clock}
32.768 kHz
Crystal
X1CKI/BBCLK
X1CKO
X2CKI
X2CKO
PB[7:0]
8
PC[7:0]
8
A[22:0]
23
SEL0
SEL1
Power
Supply
RF Interface
1
AVCC
SEL2
1
AGND
SELIO
1
ADVCC
WR0
1 ^{ADGND CP3BT23} WR1
6 ^VCC (LQFP-144) ^RD
6
GND
10
IOVCC
11
IOGND
RFDATA
PGO/RFSYNC
PG1/RFCE
Chip Reset
RESET
PG3/SCLK
PG4/SDAT
JTAG I/F to
Debugger/
Programmer
Mode
Selection
te ^RF/MFT
ADC/
le ^Touchscreen
o ACCESS.bus
s ^{CAN0 Bus/MIWU}
CAN0 Bus
b ^{CAN1 Bus}
TMS
TDI
TDO
TCK
RDY
PG5/SLE
PE0/RXD0
PE1/TXD0
PE2/RTS
PE3/CTS
ENV0
ENV1
PE4/CKX/TB
ENV2
PH0/RXD1/WUI11
PG7/BTSEQ3/
TA
ADC0/TSX+
ADC1/TSY+
ADC2/TSX-
ADC3/TSY-
PH1/TXD1/WUI12
PH2/RXD1/WUI13
PH3/TXD1/WUI14
PH4/RXD1/WUI15
PH5/TXD1/WUI16
ADC4/MUXOUT0
ADC5/MUXOUT1 PF0/MSK/TIO1
ADC6
PF1/MDIDO/TIO2
ADC7/ADCIN PF2/MDODO/TIO3
PJ7/ASYNC/
WUI9
PF3/MWCS/TIO4
VREFP
PF4/SCK/TIO5
PF5/SFS/TIO6
SDA
SCL
PF6/STD/TIO7
PF7/SRD/TIO8
PE5/SRFS/NMI
PG2/BTSEQ1/SRCLK
PH6/CAN0RX/
WUI17
PH7/CAN0TX
PE6/CAN1RX
PE7/CAN1TX
PJ0/WUI18
PJ1/WUI19
PJ2/WUI20
PJ3/WUI21
PJ4/WUI22
PJ5/WUI23
PJ6/WUI24
PG6/BTSEQ2/WUI10
JTAG I/F to
Debugger/
Programmer
UART0
UART0/MFT _Mode
Selection
UART1/MIWU
RF/MFT
UART2/MIWU
UART3/MIWU
ADC/
Touchscreen
Microwire/
SPI/
VTU
AAI/
VTU
ACCESS.bus
AAI/NMI
RF/AAI
CAN0 Bus/MIWU
CAN0 Bus
MIWU
CAN1 Bus
RF/MIWU
TMS
TDI
TDO
TCK
RDY
PG5/SLE
PE0/RXD0
PE1/TXD0
PE2/RTS
PE3/CTS
ENV0
ENV1
PE4/CKX/TB
ENV2
PH0/RXD1/WUI11
PG7/BTSEQ3/
TA
PH1/TXD1/WUI12
PH2/RXD1/WUI13
ADC0/TSX+
PH3/TXD1/WUI14
ADC1/TSY+
ADC2/TSX-
ADC3/TSY-
PH4/RXD1/WUI15
PH5/TXD1/WUI16
ADC4/MUXOUT0
ADC5/MUXOUT1 _PF0/MSK/TIO1
ADC6
PF1/MDIDO/TIO2
ADC7/ADCIN _{PF2/MDODO/TIO3}
PJ7/ASYNC/
WUI9
PF3/MWCS/TIO4
VREFP
PF4/SCK/TIO5
PF5/SFS/TIO6
SDA
SCL
PF6/STD/TIO7
PF7/SRD/TIO8
PE5/SRFS/NMI
PG2/BTSEQ1/SRCLK
PH6/CAN0RX/
WUI17
PJ0/WUI18
PH7/CAN0TX _{PG6/BTSEQ2/WUI10}
PE6/CAN1RX
PE7/CAN1TX
Figure 1. CP3BT23 Device SIgnals
Some pins may be enabled as general-purpose I/O-port
O ^{pins or as alternate functions associated with specific pe-}
ripherals or interfaces. These pins may be individually con-
figured as port pins, even when the associated peripheral or
interface is enabled. Table 2 describes the device signals for
the LQFP-128 package. Table 3 describes the device sig-
nals for the LQFP-144 package.
External
Bus
Interface
RF Interface
UART0
UART0/MFT
UART1/MIW
UART2/MIW
UART3/MIW
Microwire/
SPI/
VTU
AAI/
VTU
AAI/NMI
RF/AAI
MIWU
RF/MIWU
DS284
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