CP3BT23 Datasheet, PDF (133/260 Pages) Texas Instruments – CP3BT23 Reprogrammable Connectivity Processor with Bluetooth and Dual CAN Interfaces

If the corresponding Frame Sync Select (FSS) bit in the Au- Some codecs require an inverted frame sync signal. This is
dio Control and Status register is set, the receive and/or available by setting the Inverted Frame Sync bit in the
transmit path generates or recognizes long frame sync puls- AGCR register.
es. For 8-bit data, the frame sync pulse generated will be 6
bit shift clock periods long, and for 16-bit data the frame
19.6.3
Audio Control Data
sync pulse can be configured to be 13, 14, 15, or 16 bit shift The audio interface provides the option to fill a 16-bit slot
clock periods long. When receiving frame sync, it should be with up to three data bits if only 13, 14, or 15 PCM data bits
active on the first bit of data and stay active for a least two ^{are transmitted. These additional bits are called audio con-}
bit clock periods. It must go low for at least one bit clock pe- trol data and are appended to the PCM data stream. The
riod before starting a new frame. When long frame sync AAI can be configured to append either 1, 2, or 3 audio con-
pulses are used, the transfer of the first word (first slot) be- ^{trol bits to the PCM data stream. The number of audio data}
gins at the first positive edge of the bit shift clock after the bits to be used is specified by the 2-bit Audio Control On
positive edge of the frame sync pulse. Figure 69 shows ex- (ACO) field. If the ACO field is not equal to 0, the specified
amples of short and long frame sync pulses.
number of bits are taken from the Audio Control Data field
(ACD) and appended to the data stream during every trans-
Bit Shift Clock
(SCK/SRCLK)
Shift Data
(STD/SRD)
D0 D1 D2 D3 D4 D5 D6 D7
Short Frame
te ^{Sync Pulse}
mit operation. The ADC0 bit is the first bit added to the
transmit data stream after the last PCM data bit. Typically,
these bits are used for gain control, if this feature is support-
ed by the external PCM codec.Figure 70 shows a 16-bit slot
comprising a 13-bit PCM data word plus three audio control
bits.
Long Frame
Sync Pulse
DS156
le ^{Figure 69. Short and Long Frame Sync Pulses}
SCK
o _SFS
s _STD
D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 D10 D11 D12 ACD2 ACD1 ACD0
13-bit PCM Data Word
Audio
Control
Bits
b_{16-bit Slot}
DS161
O^{Figure 70. Audio Slot with Audio Control Data}
www.national.com
132