CP3BT23 Datasheet, PDF (78/260 Pages) Texas Instruments – CP3BT23 Reprogrammable Connectivity Processor with Bluetooth and Dual CAN Interfaces

SDAT
H2 H1 H0 W A4 A3 A2 A1 A0 D31 D30
D16
H2 H1 H0 W A4 A3 A2 A1 A0 D15 D14
D0
SCLK
>500 ns
SLE
DS322
Figure 21. 32-Bit Write Timing
SDAT
H2 H1 H0 R A4 A3 A2 A1 A0 D31
D16
H2 H1 H0 R A4 A3 A2 A1 A0 D15
D0
SCLK
te ^{>500 ns}
SLE
DS323
le ^{Figure 22. 32-Bit Read Timing}
An example of a 32-bit write is shown in Table 31. In this ex-
ample, the 32-bit value FFFF DC04h is written to register
address 0Ah. In cycle 1, the high word (FFFFh) is written. In
the first part of cycle 2, the CP3BT23 drives the header, R/
o W bit, and register address for a read cycle. In the second
part of cycle 2, the LMX5252 drives the counter value. The
counter value is 0, which indicates one word has been writ-
ten. In cycle 3, the low word (DC04h) is written. In the first
part of cycle 4, the CP3BT23 drives the header, R/W bit,
and register address for a read cycle. In the second part of
cycle 4, the LMX5252 drives the counter value. The counter
value is 1, which indicates two words have been written.
Table 31 Example of 32-Bit Write with Interleaved Reads
s _Cycle
Serial Data on SDAT
Description
1 ^{101 0 01010 1111111111111111} Write cycle driven by CP3BT23. Data is FFFFh. Address is 0Ah.
b ^{101 1 01010}
First part of read cycle driven by CP3BT23. Address is 0Ah.
2
0000000000000000 _{Second part of read cycle driven by LMX5252. Counter value is 0.}
3 ^{101 0 01010 1101110000000100} Write cycle driven by CP3BT23. Data is DC04h. Address is 0Ah.
O ^{101 1 01010}
First part of read cycle driven by CP3BT23. Address is 0Ah.
4
0000000000000001 _{Second part of read cycle driven by LMX5252. Counter value is 1.}
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