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CP3BT23 Datasheet, PDF (108/260 Pages) Texas Instruments – CP3BT23 Reprogrammable Connectivity Processor with Bluetooth and Dual CAN Interfaces
ity is combined by the 4-bit TXPRI value and the 4-bit buffer 18.6.3 Transmit Procedure
number (0...14) as shown below. The lowest resulting num- The transmission of a CAN message must be executed as
ber results in the highest transmit priority.
follows (see also Figure 55)
1. Configure the CNSTAT status field as
7
4
3
0
TX_NOT_ACTIVE. If the status is TX_BUSY, a previ-
TXPRI
BUFFER #
ous transmit request is still pending and software has
no access to the data contents of the buffer. In that
case, software may choose to wait until the buffer be-
Table 40 shows the transmit priority configuration if the pri-
comes available again as shown. Other options are to
ority is TXPRI = 0 for all transmit buffers:
exit from the update routine until the buffer has been
Table 40 Transmit Priority (TXPRI = 0)
transmitted with an interrupt generated, or the trans-
mission is aborted by an error.
TXPRI
Buffer
Number
2. Load buffer identifier and data registers. (For remote
PRI
TX Priority
frames the RTR bit of the identifier needs to be set and
0
0
0
Highest
0
1
1
:
:
:
:
:
:
:
:
0
14
14
Lowest
te Table 41 shows the transmit priority configuration if TXPRI
is different from the buffer number:
Table 41 Transmit Priority (TXPRI not 0)
loading data bytes can be omitted.)
3. Configure the CNSTAT status field to the desired value:
— TX_ONCE to trigger the transmission process of a
single frame.
— TX_ONCE_RTR to trigger the transmission of a sin-
gle data frame and then wait for a received remote
frame to trigger consecutive data frames.
— TX_RTR waits for a remote frame to trigger the trans-
mission of a data frame.
Writing TX_ONCE or TX_ONCE_RTR in the CNSTAT sta-
tus field will set the internal transmit request for the CAN
module.
TXPRI
le 14
Buffer
Number
0
If a buffer is configured as TX_RTR and a remote frame is
PRI
TX Priority received, the data contents of the addressed buffer will be
transmitted automatically without further CPU activity.
224
Lowest
13
1
209
Write_buffer
12
2
194
o 11
3
179
10
4
164
Write
TX_NOT_ACTIVE
s 9
5
149
8
6
134
7
7
119
b 6
8
104
Yes
TX_BUSYx?
No
Write ID/data
5
9
89
O 4
10
74
Write
TX_ONCE
or
TX_ONCE_RTR
3
11
59
or
TX_RTR
2
12
44
1
13
29
Exit
0
14
14
Highest
DS041
Note: If two buffers have the same priority (PRI), the buffer
with the lower buffer number will have the higher priority.
Figure 55. Buffer Write Routine
107
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