CP3BT23 Datasheet, PDF (64/260 Pages) Texas Instruments – CP3BT23 Reprogrammable Connectivity Processor with Bluetooth and Dual CAN Interfaces

13.0 Multi-Input Wake-Up
The Multi-Input Wake-Up (MIWU) unit consists of two iden- rupt handler. Therefore, setting up the MIWU interrupt han-
tical 16-channel modules. Each module can assert a wake- dler is essential for any wake-up operation.
up signal for exiting from a low-power mode, and each can _{Each 16-channel module has four interrupt requests that}
assert an interrupt request on any of four Interrupt Control _{can be routed to the ICU as shown in Figure 12. Each of the}
Unit (ICU) channels assigned to that module. The modules _{16 channels can be programmed to activate one of these}
operate independently, so each may assert an interrupt re- _{four interrupt requests.}
quest to the ICU. Together, these modules provide 32 MIWU
input channels and 8 interrupt request outputs.
The 32 MIWU channels are named WUI0 through WUI31,
as shown in Table 27.
Each 16-channel module monitors its inputs for a software-
selectable trigger condition. On detection of a trigger condi- ^{Each channel can be configured to trigger on rising or falling}
tion, the module generates an interrupt request and if en- ^{edges, as determined by the setting in the WK0EDG or}
abled, a wake-up request. A wake-up request can be used ^{WK1EDG register. Each trigger event is latched into the}
by the power management unit to exit the Halt, Idle, or Pow- ^{WK0PND or WK1PND register. If a trigger event is enabled}
er Save mode and return to the Active mode. An interrupt
request generates an interrupt to the CPU, which allows an
interrupt handler to respond to MIWU events.
The wake-up event only activates the clocks and CPU, but
does not by itself initiate execution of any code. It is the in-
terrupt request asserted by the MIWU that gets the CPU to
te ^{start executing code, by jumping to the corresponding inter-}
by its respective bit in the WK0ENA or WK1ENA register, an
active wake-up/interrupt signal is generated. Software can
determine which channel has generated the active signal by
reading the WK0PND or WK1PND register.
The MIWU is active at all times, including the Halt mode. All
device clocks are stopped in this mode. Therefore, detecting
an external trigger condition and the subsequent setting of
the pending bit are not synchronous to the System Clock.
Peripheral Bus
le _{WUI0 WUI16}
so ^{WUI15 WUI31}
WK0EDG
WK1EDG
15 ^{. . . . . . . . . . .} 0
WK0IENA
WK1IENA
0
15
WK0PND
WK1PND
WK0ICTL1/WK0ICTL2
WK1ICTL1/WK1ICTL2
4
Encoder
MIWU Interrupt 3:0
MIWU Interrupt 7:4
b _WK0ENA
O ^WK1ENA
Wake-Up Signal
To Power Mgt
15 ^{. . . . . . . . . . .} 0
DS218
Figure 12. Multi-Input Wake-Up Module Block Diagram
63
www.national.com