CP3BT23 Datasheet, PDF (25/260 Pages) Texas Instruments – CP3BT23 Reprogrammable Connectivity Processor with Bluetooth and Dual CAN Interfaces

6.0 Memory
The CP3BT23 supports a uniform 16M-byte linear address are reserved and must not be read or written. The BIU
space. Table 6 lists the types of memory and peripherals zones are regions of the address space that share the same
that occupy this memory space. Unlisted address ranges control bits in the Bus Interface Unit (BIU).
Table 6 CP3BT23 Memory Map
Start
Address
End
Address
Size in
Bytes
Description
BIU Zone
00 0000h
03 FFFFh
256K
On-chip Flash Program Memory, including Boot Static Zone 0
Memory
(mapped internally
04 0000h
0C FFFFh
576K Reserved
in IRE and ERE
mode; mapped to
0D 0000h
0D 1FFFh
8K
On-chip Flash Data Memory
the external bus in
0D 2000h
0E 0000h
0E 8000h
0E 9200h
te ^{0E E800h}
0E EC00h
0E F000h
0E F140h
le ^{0E F180h}
0E F200h
0E F320h
10 0000h
o _{40 0000h}
80 0000h
s FF 0000h
FF F200h
FF F600h
b _{FF FB00h}
FF FC00h
0D FFFFh
0E 7FFFh
0E 91FFh
0E E7FFh
0E EBFFh
0E EFFFh
0E F13Fh
0E F17Fh
0E F1FFh
0E F33Fh
0F FFFFh
3F FFFFh
7F FFFFh
FE FFFFh
FF F1FFh
FF F5FFh
FF FAFFh
FF FBFFh
FF FFFFh
56K
32K
4.5K
21.5K
1K
1K
320
64
128
320
67K
3072K
4096K
8128K
61952
1K
1280
256
1K
Reserved
DEV mode)
System RAM
N/A
Bluetooth Data RAM
Reserved
Bluetooth Lower Link Controller Sequencer RAM
Reserved
CAN0 Buffers and Registers
Reserved
Bluetooth Lower Link Controller Registers
CAN1 Buffers and Registers
Reserved
Reserved
External Memory Zone 1
Static Zone 1
External Memory Zone 2
Static Zone 2
Reserved
Peripherals and Other I/O Ports
N/A
BIU, DMA, Flash interfaces
IN/A
I/O Expansion
I/O Zone
Peripherals and Other I/O Ports
N/A
O ^{6.1 OPERATING ENVIRONMENT}
mode is selected. When ENV[2:0] = 011b, ERE mode is se-
The operating environment controls whether external mem-
ory is supported and whether the reset vector jumps to a
code space intended to support In-System Programming
(ISP). Up to 12M of external memory space is available.
lected unless the EMPTY bits indicate that the program
flash memory is empty, in which case ISP mode is selected.
When ENV[2:0] = 110b, ISP mode is selected without re-
gard to the states of the EMPTY bits. See Section 8.4.2 for
more details.
The operating mode of the device is controlled by the states
on the ENV[2:0] pins at reset and the states of the EMPTY
bits in the Protection Word, as shown in Table 7. Internal
pullups on the ENV[2:0] pins select IRE mode or ISP mode
if these pins are allowed to float.
In the DEV environment, the on-chip flash memory is dis-
abled, and the corresponding region of the address space
is mapped to external memory. DEVINT mode is equivalent
to DEV mode but maps static memory zone 0 to the on-chip
memory.
When ENV[2:0] = 111b, IRE mode is selected unless the
EMPTY bits in the Protection word indicate that the program
flash memory is empty (unprogrammed), in which case ISP
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