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CP3BT23 Datasheet, PDF (232/260 Pages) Texas Instruments – CP3BT23 Reprogrammable Connectivity Processor with Bluetooth and Dual CAN Interfaces
29.9 ADVANCED AUDIO INTERFACE (AAI) TIMING
Table 80 Advanced Audio Interface (AAI) Signals
Symbol Figure
Description
Reference
Min (ns)
Max (ns)
AAI Input Signals
tRDS
tRDH
tFSS
tFSH
tCP
tCL
tCH
tFSVH
tFSVL
tTDV
114,
116
Receive Data Setup Time
Before Falling Edge (FE)
on SRCLK
20
-
114,
116
Receive Data Hold Time
After FE on SRCLK
20
-
114 Frame Sync Setup Time
Before Rising Edge (RE)
on SRCLK
20
-
114
114
114
114
114,
116
114,
116
115,
117
Frame Sync Hold Time
After RE on SRCLK
AAI Output Signals
Receive/Transmit Clock Period
Receive/Transmit Low Time
te Receive/Transmit High Time
Frame Sync Valid High
RE on SRCLK/SCK to RE
on SRCLK/SCK
FE on SRCLK/SCK to RE
on SRCLK/SCK
RE on SRCLK/SCK to FE
on SRCLK/SCK
RE on SRCLK/SCK to RE
on SRFS/SFS
Frame Sync Valid Low
RE on SRCLK/SCK to FE
on SRFS/SFS
le Transmit Data Valid
RE on SCK to STD Valid
20
976.6
488.3
488.3
-
-
-
o SRCLK
bs SRFS
OSRD
tFSVH
tCP
0
1
2
tCH
tCL
tFSVL
0
1
-
-
-
-
20
20
20
tRDS
tRDH
DS116
Figure 114. Receive Timing, Short Frame Sync
231
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