CP3BT23 Datasheet, PDF (230/260 Pages) Texas Instruments – CP3BT23 Reprogrammable Connectivity Processor with Bluetooth and Dual CAN Interfaces

29.7 UART TIMING
Table 78 UART Signals
Symbol Figure
Description
Reference
Min (ns)
Max (ns)
UART Input Signals
t_CKX
t_RXS
t_RXH
112
CKX period
(synchronous mode)
112
RXD setup time
(synchronous mode)
112
RXD hold time
(synchronous mode)
250
-
Before Falling Edge (FE)
on CKX
40
-
Before FE on CKX
40
-
t_TXD
UART Output Signals
112
TXD output valid
(synchronous mode)
After Rising Edge (RE) on
CKX
-
40
te ^CKX
t_CKX
le ^TXD
t_TXD
t_RXS
o ^RXD
t_RXH
DS099
Obs^{Figure 112. UART Synchronous Mode Timing}
229
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