CP3BT23 Datasheet, PDF (148/260 Pages) Texas Instruments – CP3BT23 Reprogrammable Connectivity Processor with Bluetooth and Dual CAN Interfaces

Data bits are sensed by taking a majority vote of three sam-
ples latched near the midpoint of each baud (bit time). Nor-
mally, the position of the samples within the baud is
determined automatically, but software can override the au-
tomatic selection by setting the USMD bit in the UnMDSL2
register and programming the UnSPOS register.
of the RSFT register are copied into the UnRBUF register
and the Receive Buffer Full bit (URBF) is set. The URBF bit
is automatically cleared when software reads the character
from the URBUF register. The RSFT register is not software
accessible.
Serial data input on the RXD pin is shifted into the RSFT
register. On receiving the complete character, the contents
Transmitter
TXD
Baud Clock
Control and
Error Detection
te ^Parity
Generator/Checker
System Clock
Baud Rate
Generator
Flow Control
Logic
Baud Clock
Receiver
le _{Figure 74. UART Block Diagram}
RTS
CTS
CKX
RXD
DS060
o _{16 1}
2
3
4
5
6
7
8
9 10 11 12 13 14 15 16 1
s _Sample
STARTBIT
Sample
DATA (LSB)
b_{16 1}
2
3
4
5
6
7
8
9 10 11 12 13 14 15 16 1
O ^Sample
DATABIT
DS061
Figure 75. UART Asynchronous Communication
147
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