CP3BT23 Datasheet, PDF (146/260 Pages) Texas Instruments – CP3BT23 Reprogrammable Connectivity Processor with Bluetooth and Dual CAN Interfaces

DMAPI
The DMA Enable for PCM In bit enables hard- CVNF
The CVSD Out FIFO Nearly Full bit indicates
ware DMA control for writing PCM data into
when only three empty word locations are left
the PCMIN register. If cleared, DMA support
in the CVSD Out FIFO, so the CVSD Out
is disabled. After reset, this bit is clear.
FIFO should be read. If the CVSDINT bit is
0 – PCM input DMA disabled.
set, an interrupt will be asserted when the
1 – PCM input DMA enabled.
CVNF bit is set. If the DMACO bit is set, a
CVSDCONV The CVSD to PCM Conversion Format field
DMA request will be asserted when this bit is
specifies the PCM format for CVSD/PCM con-
set. Software must not rely on the CVNF bit as
versions. After reset, this field is clear.
an indicator of the number of valid words in
00 – CVSD <-> 8-bit µ-Law PCM.
the FIFO. Software must check the CVOUTST
01 – CVSD <-> 8-bit A-Law PCM.
field to read the number of valid words in the
10 – CVSD <-> Linear PCM.
FIFO. The CVNF bit is cleared when the
11 – Reserved.
CVSTAT register is read.
PCMCONV The PCM to PCM Conversion Format bit se-
0 – CVSD Out FIFO is not nearly full.
lects the PCM format for PCM/PCM conver-
1 – CVSD Out FIFO is nearly full.
lete ^RESOLUTION
sions.
0 – Linear PCM <-> 8-bit µ-Law PCM
1 – Linear PCM <-> 8-bit A-Law PCM
The Linear PCM Resolution field specifies the
attenuation of the PCM data for the linear
PCM to CVSD conversions by right shifting
and sign extending the data. This affects the
log PCM data as well as the linear PCM data.
The log data is converted to either left-justified
zero-stuffed 13-bit (A-law) or 14-bit (u-law).
The RESOLUTION field can be used to com-
pensate for any change in average levels re-
sulting from this conversion. After reset, these
two bits are clear.
00 – No shift.
01 – 1-bit attentuation.
10 – 2-bit attentuation.
11 – 3-bit attentuation.
PCMINT
CVE
20.9.10 CVSD Status Register (CVSTAT)
o The CVSTAT register is a 16-bit wide, read-only register that _CVF
holds the status information of the CVSD/PCM module. At
reset, and if the CVCTL1.CVEN bit is clear, all implemented
bits are cleared.
s ₇
5
CVINST
4
3
2
1
0
CVF CVE PCMINT CVNF CVNE
b ₁₅
11 10
8
O^Reserved
CVOUTST
CVINST
The PCM Interrupt bit set indicates that the
PCMOUT register is full and needs to be read
or the PCMIN register is empty and needs to
be loaded with new PCM data. The PCMINT
bit is cleared when the CVSTAT register is
read, unless the device is in FREEZE mode.
0 – PCM does not require service.
1 – PCM requires loading or unloading.
The CVSD In FIFO Empty bit indicates when
the CVSD In FIFO has been read by the
CVSD converter while the FIFO was already
empty. If the CVSDERRORINT bit is set, an
interrupt will be asserted when the CVE bit is
set. The CVE bit is cleared when the CVSTAT
register is read, unless the device is in
FREEZE mode.
0 – CVSD In FIFO has not been read while
empty.
1 – CVSD In FIFO has been read while emp-
ty.
The CVSD Out FIFO Full bit set indicates
whether the CVSD Out FIFO has been written
by the CVSD converter while the FIFO was al-
ready full. If the CVSDERRORINT bit is set,
an interrupt will be asserted when the CVF bit
is set. The CVF bit is cleared when the
CVSTAT register is read, unless the device is
in FREEZE mode.
0 – CVSD Out FIFO has not been written
while full.
1 – CVSD Out FIFO has been written while
full.
The CVSD In FIFO Status field reports the
current number of empty 16-bit word locations
CVNE
The CVSD In FIFO Nearly Empty bit indicates
when only three CVSD data words are left in
the CVSD In FIFO, so new CVSD data should
be written into the CVSD In FIFO. If the CVS-
DINT bit is set, an interrupt will be asserted
when the CVNE bit is set. If the DMACI bit is
set, a DMA request will be asserted when this
bit is set. The CVNE bit is cleared when the
CVSTAT register is read.
0 – CVSD In FIFO is not nearly empty.
CVOUTST
in the CVSD In FIFO. When the FIFO is emp-
ty, the CVINST field will read as 111b. When
the FIFO holds 7 or 8 words of data, the
CVINST field will read as 000b.
CVSD Out FIFO Status field reports the cur-
rent number of valid 16-bit CVSD data words
in the CVSD Out FIFO. When the FIFO is
empty, the CVOUTST field will read as 000b.
When the FIFO holds 7 or 8 words of data, the
CVOUTST field will read as 111b.
1 – CVSD In FIFO is nearly empty.
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