TI380C30A Datasheet, PDF (71/81 Pages) Texas Instruments – INTEGRATED TOKEN-RING COMMPROCESSOR AND PHYSICAL-LAYER INTERFACE

User Master
TI380C30A
INTEGRATED TOKEN-RING COMMPROCESSOR
AND PHYSICAL-LAYER INTERFACE
SPWS034 – MARCH 1998
Bus Exchange
SIF Master
SBCLK
SIF
Inputs
SBGR
208a
208b
SBERR
SDTACK
SBBSY
230
230
SBRQ†
SAS
SLDS
SUDS
SIF
Outputs
SRNW
SADH0–
SADH7
SADL0–
SADL7
SPH
SPL
SDDIR
SOWN‡
208a
Input
Hi-Z
208b
212
224c
224a
241a
241
Output
241
Read
Write
SIF
Write
Read
† _{In 80x8x mode, the system interface deasserts SHRQ on the rising edge of SBCLK following the T4 state of the last system-bus transfer}
it controls. In 68xxx mode, the system interface deasserts SBRQ on the rising edge of SBCLK in state T2 of the first system-bus transfer
it controls.
‡ _{While the system-interface DMA controls are active (that is, SOWN is asserted), the SCS input is disabled.}
Figure 31. 68xxx-Mode Bus Arbitration – SIF Takes Control
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